SLP (Substrate-like PCB) is not an entirely new technological category, but rather a ‘transitional high-end PCB technology’ bridging the gap between traditional HDI PCBs and IC packaging substrates. Its core positioning lies in integrating the mature manufacturing processes of PCBs with the fine-pitch routing characteristics of IC substrates. This enables higher circuit density and integration than HDI, while maintaining cost control, thereby meeting the demands for miniaturisation and high performance in electronic products. Simply put, SLP represents a novel circuit board that ‘approaches substrate performance while retaining the cost advantages of PCB’.
From a technical definition perspective, SLP’s core characteristics manifest across three dimensions:
- Circuit precision surpassing HDI limits. Conventional HDI typically operates at line widths/spacing of approximately 50μm, whereas SLP reduces these parameters to 30/30μm. High-end variants achieve 20/20μm, approaching the precision levels of ABF substrates. This enables twice the component density per unit area compared to HDI.
- Adoption of substrate-like build-up processes. SLP employs IC substrate build-up techniques, utilising multiple lamination steps, laser drilling, and electroplating to achieve multi-layer routing. Compared to traditional HDI processes, this yields tighter interlayer connections, shorter signal transmission paths, and superior signal integrity.
- Compatibility with PCB substrates. Unlike the specialised materials used in IC substrates, SLP primarily employs the standard FR-4 substrate commonly used in PCBs. This enables its production processes to be compatible with existing PCB manufacturing lines, significantly reducing the cost of technological transition. This compatibility is a key factor in SLP’s rapid commercialisation.
Historically, SLP’s commercialisation stemmed from urgent demands in consumer electronics. In 2017, Apple pioneered SLP integration in the iPhone X using the semi-additive process (MSAP), reducing the mainboard footprint by nearly 20% to accommodate larger batteries and additional functional modules. This marked SLP’s formal entry into mainstream awareness. Subsequently, premium smartphone manufacturers such as Samsung and Huawei followed suit, driving rapid iteration of SLP technology. Today, SLP has established a mature technological gradient, categorised by line width/spacing into tiers of 30μm, 25μm, 20μm and below to accommodate diverse high-end application requirements. The global market reached RMB 31.5 billion in 2024 and continues to grow steadily.
Core Differences Between SLP and HDI PCB
In terms of technical performance, SLP comprehensively leads in precision and integration. As previously noted, SLP achieves line widths/spacings as low as 20μm, whereas HDI typically operates at 40-50μm. Regarding micro-via diameter, SLP enables laser-drilled vias below 0.08mm, while HDI vias generally measure no less than 0.1mm. Regarding integration density, SLP employs multi-layer stacking structures to accommodate more component connections per unit area. For instance, a 50mm × 50mm SLP motherboard can host 30%-50% more chips than an HDI pcb of identical dimensions. Furthermore, SLP offers superior signal transmission efficiency. Its shorter, more orderly circuitry reduces signal attenuation by 15%-20% compared to HDI, making it better suited for 5G high-frequency signals and the high-speed data transmission demands of AI chips.
Regarding manufacturing processes and costs, HDI pcb possesses significant maturity and cost advantages. HDI pcb techniques have evolved over decades, supported by a mature global supply chain, with yield rates commonly exceeding 95%. with conventional HDI unit costs ranging from 800 to 1200 yuan per square metre. Conversely, SLP employs more complex processes such as MSAP (Modified Semi-Additive Process), demanding stricter precision in equipment (e.g., laser direct imaging LDI systems, high-precision electroplating apparatus). Initial yield rates for SLP were only around 85%, Following years of optimisation, leading manufacturers have now elevated yields to 92%. Nevertheless, unit costs remain substantial at ¥1,500–2,500 per square metre, representing 1.5–2 times that of conventional HDI. Furthermore, HDI production lines are relatively straightforward to upgrade, enabling small-to-medium PCB manufacturers to achieve high-end HDI mass production through partial equipment enhancements. In contrast, SLP production necessitates entirely new clusters of high-precision equipment, requiring substantial initial investment. Consequently, only leading enterprises possess the capability for mass production.
At the application level, the two technologies exhibit distinct market segmentation. SLP primarily targets high-end consumer electronics and emerging technology applications, such as premium smartphone motherboards (Apple iPhone series, Samsung S series), hinge regions of foldable smartphones, high-end wearables (smartwatches, AR glasses), and AIoT terminals. These applications demand exceptional device compactness and performance, justifying higher PCB costs. HDI pcb, meanwhile, covers a broader spectrum including mid-to-high-end consumer electronics, automotive electronics, and 5G modules. Examples encompass mid-to-low-end smartphones, tablets, in-vehicle infotainment systems, and 5G base station small cells. These applications are cost-sensitive and do not demand the circuit precision levels required by SLP, where HDI’s “performance-cost” balance proves more advantageous.
Technical Advantages of SLP
SLP addresses the spatial optimisation demands of high-end electronic devices. As smartphones and wearables undergo continuous functional upgrades, the integration pressure from modules like multiple cameras, 5G modems, AI chips, and high-capacity batteries intensifies, making motherboard space a critical bottleneck. SLP’s high integration density significantly reduces motherboard footprint. For instance, Apple’s iPhone X, utilising an SLP motherboard, achieved an 18% reduction in board area compared to its predecessor using HDI, thereby creating space for increased battery capacity. This spatial optimisation capability remains beyond HDI’s reach, constituting the primary reason premium manufacturers select SLP.
SLP’s compatibility with advanced packaging technologies aligns with future industry trends. As chiplet and PoP (Package-on-Package) technologies proliferate, PCB routing precision and interlayer connection reliability face heightened demands. SLP achieves line fineness approaching that of IC carrier boards, enabling seamless integration with advanced packaging technologies for efficient chip-to-PCB connectivity. Conversely, HDI’s insufficient fineness struggles to meet signal transmission demands of technologies like chiplets. This positions SLP as the optimal partner for advanced packaging in future high-end electronics, further highlighting its substitution potential.
SLP costs continue to decline, narrowing the gap with HDI. Technological breakthroughs and capacity expansions by Chinese manufacturers (such as Peng Teng Holdings and Jingwang Electronics) have steadily improved SLP production yields while reducing costs. For instance, Jingwang Electronics optimised its MSAP process to achieve a 92% yield for 25μm line width/spacing SLP, with unit costs falling by 30% compared to 2020. Concurrently, the domestic production of upstream materials—such as high-precision copper foil and low-loss FR-4 substrates—further reduces SLP manufacturing costs. It is projected that within the next three to five years, the cost gap between SLP and high-end HDI will narrow to within 50%, significantly broadening SLP’s substitution scope.
Despite SLP’s rapid advancement, HDI will not be entirely supplanted. Its irreplaceability stems from extensive application scenarios, a mature cost structure, and performance suitability in specific domains. Within most mid-to-high-end market segments, HDI’s ‘performance-cost’ equilibrium advantage will persist long-term.
- In the mid-to-low-end consumer electronics and industrial control sectors, HDI’s cost advantage remains unshakeable. For products such as mid-to-low-end smartphones, tablets, and standard IoT devices, which feature lower component density and require circuit line precision within 50μm, HDI fully meets these requirements. Conversely, SLP’s high cost significantly increases the end product’s price point, diminishing market competitiveness. For instance, in smartphones priced below ¥1,500, the mainboard cost is typically capped at ¥50. HDI implementation costs around ¥30-40, whereas SLP requires ¥60-80 – substantially exceeding budget constraints. Within industrial control applications, stability demands outweigh precision requirements, making HDI’s proven maturity and reliability the preferred choice.
- In automotive electronics, HDI’s environmental resilience proves more suitable. Automotive electronics must operate long-term in harsh conditions involving high temperatures, humidity, and severe vibration, imposing stringent demands on PCB thermal resistance, moisture/heat tolerance, and mechanical strength. The traditional FR-4 substrate used in HDI has been proven over many years to offer excellent environmental resistance, meeting the reliability requirements of automotive electronics. Conversely, SLP’s fine traces carry a higher risk of fracture under severe vibration, and its resistance to moisture-heat ageing still requires long-term validation. Currently, automotive electronics such as infotainment systems and body control modules predominantly utilise HDI, with SLP seeing limited application only in autonomous driving modules of certain high-end electric vehicles.
- HDI technology continues to evolve, enhancing its competitive edge. Confronted by SLP’s emergence, HDI is consolidating its market position through technological upgrades. For instance, the development of Any Layer HDI enables arbitrary interconnection between layers, boosting routing flexibility; optimised laser drilling technology has reduced HDI microvia diameters to 0.08mm, approaching SLP levels; while the adoption of low-loss substrates has elevated HDI’s signal transmission efficiency, enabling compatibility with certain mid-to-high frequency applications. These technological advancements have progressively strengthened HDI’s competitiveness in the mid-to-high-end market, fostering a differentiated competitive landscape with SLP.
The future landscape of SLP and HDI does not represent an either-or substitution relationship, but rather a symbiotic arrangement where SLP dominates the high-end market, HDI deepens its presence in the mid-to-high-end market, and both technologies complement each other in specific scenarios. This configuration arises from the combined influence of technical characteristics, cost structures, and market demands, and is set to endure over the long term.
Within premium consumer electronics and emerging technologies, SLP will steadily expand its market share. As sectors like 6G communications, AR/VR, and AI-enabled devices advance, demands for PCB precision and integration will intensify, further highlighting SLP’s technical advantages. By 2030, SLP penetration is projected to exceed 80% in high-end smartphone motherboards and surpass 60% in AR/VR devices. Concurrently, SLP will evolve towards finer line widths and spacings, gradually reducing to below 15/15μm, thereby approaching the performance levels of IC carrier boards.
In mid-to-high-end consumer electronics, automotive electronics, and industrial control sectors, HDI will retain its dominant position. These markets are vast, cost-sensitive, and do not demand PCB board performance levels matching SLP. Consequently, HDI’s ‘performance-cost’ balance advantage will persist long-term. Over the next five years, HDI is projected to maintain over 60% share of the global high-end PCB market, with automotive electronics demand growing at over 10% annually.
Furthermore, in certain complex scenarios, SLP and HDI will achieve synergistic application. For instance, in the autonomous driving domain controllers of high-end electric vehicles, the core computing module employs SLP to meet high-performance demands, while peripheral interface and power modules utilise HDI to control costs. In high-end servers, the CPU packaging area adopts SLP to accommodate chiplet technology, while other regions employ HDI for signal interconnection. This synergistic approach maximises the strengths of both technologies, achieving an optimal balance between performance and cost.
The rise of SLP does not negate HDI; rather, it represents a precise iteration of PCB technology within the high-end market. The evolution from HDI to SLP fundamentally stems from technological advancement driven by the demand for miniaturisation and high performance in electronic devices. The distinction lies in their adaptability to differing market requirements. SLP caters to the extreme demands of the high-end market through greater precision and integration, while HDI pcb covers the broader mid-to-high-end market with a more balanced performance-to-cost ratio. In the future, as technology continues to advance, the boundaries between SLP and HDI may further blur, yet their symbiotic and coexisting relationship will remain unchanged.
