As a widely used type of multilayer board in electronic devices, the standard symmetrical stack-up design for 4 layer PCBs typically employs a symmetrical structure of ‘signal layer – power layer – ground layer – signal layer’. The key advantage of this layout lies in achieving interlayer stress balance, enabling the PCB to effectively withstand the expansion and contraction stresses caused by temperature changes during manufacturing, soldering and use.
However, in actual production, influenced by factors such as product functional requirements, routing space constraints or design oversights, many 4 layer PCBs adopt an asymmetric layer stack-up design. Examples include uneven thicknesses of the two signal layers, misalignment between the power and ground layers, or an asymmetric combination of the core board and prepreg (PP sheet). These seemingly minor structural differences ultimately lead to warping.
The Fundamental Cause of Warping in 4 layer PCBs
Mismatched coefficients of thermal expansion (CTE) among materials are the root cause of warping in asymmetrical 4 layer PCBs. The core components of a PCB include copper foil, the core board and the prepreg; the thermal expansion coefficients of these different materials vary significantly: the linear thermal expansion coefficient of copper foil is approximately 17 ppm/°C, whilst that of the commonly used FR-4 core board is approximately 50 ppm/°C, and the thermal expansion coefficient of the prepreg lies between the two. During the lamination stage of PCB manufacturing, the materials of each layer must be cured and formed under high temperature and pressure.
As the temperature rises, different materials expand according to their respective coefficients of thermal expansion; during the cooling phase, the materials in each layer contract synchronously. In a symmetrical laminate design, the expansion and contraction of the materials on both sides cancel each other out, keeping the interlayer stresses in equilibrium and allowing the PCB board to remain flat; however, an asymmetrical laminate design disrupts this equilibrium, as the expansion and contraction of the material on one side is far greater than that on the other, creating opposing tensile stresses. When these tensile forces exceed the structural strength of the PCB itself, warping of the board occurs.
Taking a common asymmetric 4 layer PCB design as an example, if the copper foil thickness of the top signal layer is 2 oz, whilst that of the bottom signal layer is only 0.5 oz, and the combination of the remaining two core layers with the prepreg also lacks symmetry, a significant imbalance will arise during the lamination process. Due to its greater thickness, the top-layer copper foil exhibits relatively minor thermal expansion and contraction, whereas the thinner bottom-layer copper foil expands and contracts to a greater extent.
During heating, the bottom-layer material expands faster than the top layer, causing the board to arch upwards; during cooling, the bottom-layer material contracts faster than the top layer, generating downward tensile stress. As the material alternates between expansion and contraction, the interlayer stresses cannot be offset, ultimately causing the PCB to warp into an arched shape. This type of warping, caused by asymmetrical copper foil thickness, is particularly common in mass production, and the degree of warping increases as the difference in copper foil thickness grows.
Imbalance in the stack-up structure
Imbalances in the stack-up structure further amplify the effects of uneven stress, becoming the primary cause of warping in asymmetrical 4 layer PCBs. A symmetrical design for a 4 layer PCB requires not only symmetrical copper foil thickness and material types, but also symmetrical distribution of layer positions and thickness proportions. For example, the power and ground planes must be symmetrically distributed on either side of the core board, and the thickness and quantity of prepregs must correspondingly match. Once this symmetrical structure is disrupted, it leads to deviations in the distribution of interlayer stress, thereby causing warping.
For instance, concentrating the power layer on one side of the PCB whilst distributing the ground layer on the other, particularly where the copper area of the power layer is significantly larger than that of the ground layer, results in that side having a substantially higher thermal capacity and stress-bearing capacity than the opposite side. When temperature fluctuates, the resulting stress differential between the two sides generates a pronounced bending moment, causing the board to warp.
An asymmetrical combination of core material and prepreg can also induce warping issues. As the core support layer of the PCB, the thickness and rigidity of the core material directly affect the board’s stability, whilst the prepreg is responsible for bonding the layers together; its curing shrinkage rate and thickness directly influence interlayer stress. In an asymmetrical 4 layer PCB design, if one side uses a thicker core board paired with a thinner prepreg, whilst the other side uses a thinner core board paired with a thicker prepreg, differences in curing shrinkage rates will arise during lamination and curing.
The thicker prepreg shrinks more, exerting greater tensile force on the core board; however, the difference in rigidity between the core boards on either side cannot offset this tensile force, ultimately leading to warping and twisting of the board. Furthermore, the weave pattern of the glass fibre cloth also influences warping. There are slight differences in the thermal expansion coefficients between the warp and weft directions of the glass cloth; if the distribution of the glass cloth in the warp and weft directions is inconsistent within the asymmetric stack-up, this will further exacerbate the tendency for warping in specific directions.
Manufacturing Process Variations
Variations in the manufacturing process act as a ‘catalyst’ for warping in asymmetric 4 layer PCBs, amplifying the risks associated with structural imbalances. As a core stage in PCB manufacturing, the lamination process specifically the settings for temperature profiles, pressure parameters and cooling rates—directly influences the release and balance of interlayer stresses.
For asymmetric 4 layer PCBs, which inherently suffer from uneven stress distribution, an excessively rapid heating rate during lamination can result in excessive temperature differentials between inner and outer layers, causing instantaneous stress accumulation; if the maximum temperature is insufficient or the holding time is inadequate, incomplete resin curing will lead to excessive residual stress; if the cooling rate is too rapid, the materials do not have time to relax, and internal thermal stresses become ‘frozen’ within the pcb board,all of which exacerbate warping.
Uneven etching processes can also further exacerbate warping in asymmetrical 4 layer PCBs. During etching, the copper foil is corroded to form the circuit patterns; if the etching rates of the signal layers on either side are inconsistent, this will result in differences in the residual area and thickness of the copper foil on both sides, thereby causing an imbalance in their stress-bearing capacities.
For example, if one side is over-etched, leaving too little copper foil, the stress-bearing capacity decreases; whilst on the other side, if etching is insufficient and the residual copper foil is excessive, the stress-bearing capacity is stronger. This disparity creates new tensile stresses, driving the board to warp.Furthermore, if processes such as surface treatment and solder mask printing are not carried out correctly, they can introduce new stresses, exacerbating the warping issues caused by the asymmetric laminate.
Warpage Control and Optimisation Strategies
It is worth noting that warpage in asymmetrical 4 layer PCBs is not uncontrollable; it is essentially an external manifestation of interlayer stress imbalance, and this imbalance can be mitigated through design optimisation and process adjustments. During the design phase, the principle of symmetrical stacking should be followed as far as possible to ensure symmetry in copper foil thickness, material type and interlayer distribution. If complete symmetry cannot be achieved due to functional requirements, the differences in interlayer stress can be reduced by adjusting the copper foil area and optimising the combination of core boards and prepregs.
During the production phase, lamination process parameters should be optimised, with heating and cooling rates controlled to ensure complete resin curing and the release of residual stress; etching processes should be optimised to ensure uniform etching on both sides, thereby reducing variations in copper residue. These measures can effectively reduce the risk of warpage in asymmetric 4 layer PCBs, improving product yield and reliability.
For the PCB manufacturing industry, warpage issues caused by the lamination of asymmetric 4 layer PCBs represent both a technical challenge and an opportunity to enhance product competitiveness. A thorough understanding of the causes of warpage not only helps enterprises avoid wastage during production and reduce manufacturing costs, but also enhances product stability and reliability, thereby meeting end-customers’ high-quality demands.
