Precise control of interlayer spacing is the true key to achieving stable pcb impedance, and prepreg thickness is the “behind-the-scenes driver” that determines that spacing. How are interlayer spacing and prepreg thickness tightly linked, and through what mechanisms can impedance be regulated by adjusting prepreg thickness?
The Triangular Relationship Between Interlayer Spacing Prepreg Thickness and PCB Impedance
In PCBs, interlayer spacing (dielectric thickness) essentially refers to the thickness of the insulating medium between the signal layer and the reference layer. The primary carrier of this dielectric layer is the prepreg. In other words, even slight variations in prepreg thickness will directly cause fluctuations in interlayer spacing, which in turn affect impedance stability. These three factors form a tightly coupled triangular relationship, where none can be considered in isolation.
Interlayer spacing does not mean the distance between any two conductive layers. It specifically refers to the dielectric thickness between a signal layer and its reference layer, such as a power or ground plane. This spacing directly determines the distribution of the electromagnetic field during signal transmission.
PCB Impedance, the core metric of PCB signal transmission, is defined as the ratio of voltage to current and is mainly influenced by interlayer spacing, trace width, and dielectric constant. Among these factors, interlayer spacing has the most direct and controllable impact.
When trace width and dielectric constant remain unchanged, pcb impedance is positively correlated with interlayer spacing, and prepreg thickness directly determines the magnitude of that spacing. As prepreg thickness increases, interlayer spacing increases accordingly, the electromagnetic field becomes less confined, and impedance rises. Conversely, when prepreg thickness decreases, interlayer spacing is reduced, electromagnetic field confinement is enhanced, and impedance decreases. Even a prepreg thickness variation of just 0.02 mm can cause interlayer spacing deviation, pushing impedance beyond the industry standard tolerance of ±5% and ultimately leading to signal distortion or communication failure.
It is worth noting that different impedance types—single-ended and differential—have different requirements for interlayer spacing, but the underlying prepreg thickness control logic remains the same. Single-ended impedance (commonly 50 Ω or 75 Ω) places high demands on spacing uniformity; even minor prepreg thickness nonuniformity can cause localized spacing variation and localized impedance anomalies. Differential impedance (commonly 100 Ω or 120 Ω) depends on consistent spacing between both traces and the reference plane. Variations in prepreg thickness disrupt this consistency, introduce common-mode noise, and degrade differential signal quality. Regardless of impedance type, the core objective is the same: locking in precise interlayer spacing through controlled prepreg thickness.
Practical Steps for Controlling PCB Impedance via Prepreg Thickness
1.Establish the Prepreg Thickness Baseline
The prerequisite for adjusting prepreg thickness is determining the target interlayer spacing required to meet the PCB impedance specification, then working backward to calculate the necessary prepreg thickness. Based on PCB impedance requirements (such as 50 Ω single-ended or 100 Ω differential), trace width, and dielectric constant, the target interlayer spacing can be calculated using IPC-2141 reference formulas.
For example, with a 50 Ω single-ended impedance, FR-4 material (dielectric constant Dk = 4.4), and a trace width of 0.2 mm, the target interlayer spacing is approximately 0.15 mm. For a 100 Ω differential impedance with a trace spacing of 0.3 mm, the target interlayer spacing is approximately 0.12 mm.
When calculating prepreg thickness, resin flow behavior must be considered. During lamination, resin flows and the final cured thickness is typically smaller than the original prepreg thickness, with resin flow commonly accounting for 10%–20%. The cured prepreg thickness becomes the actual interlayer spacing. Therefore, resin flow allowance must be included in calculations. For a target spacing of 0.15 mm, a prepreg thickness of approximately 0.17–0.18 mm should be selected. For a target spacing of 0.12 mm, a prepreg thickness of about 0.14–0.15 mm is appropriate. The required allowance depends on prepreg type (such as 1080, 2116, or 7628); higher resin content leads to greater flow and requires larger allowance.
2.Match Prepreg Selection to Interlayer Spacing and PCB Impedance Requirements
High-frequency PCBs (≥10 GHz) typically require impedance tolerance within ±3%, corresponding to interlayer spacing accuracy of ≤±0.01 mm. For such applications, prepregs with thickness uniformity of ≤±5% and stable resin content—such as 7628H or 1080—should be used. These prepregs offer uniform resin distribution and stable flow behavior, ensuring consistent interlayer spacing after lamination.
For mid-speed PCBs (1–10 GHz), where pcb impedance tolerance is typically ±5% and spacing accuracy ≤±0.02 mm, standard prepreg types may be used, provided strict control over batch consistency is maintained. Mixing prepregs from different batches should be avoided to prevent thickness variation.
When a single prepreg thickness cannot meet the target interlayer spacing, multiple prepreg sheets can be stacked. For example, if the target spacing is 0.25 mm and no single prepreg meets this requirement, two 0.13 mm prepregs can be stacked. After accounting for resin flow, the cured thickness will be approximately 0.25 mm. The stacked prepregs must be of the same type and resin content to avoid uneven thickness after lamination. Pre-baking at 120 °C for 2 hours is recommended to remove moisture and prevent bubbles during lamination, which could compromise spacing integrity.
3.Optimize Lamination Process to Lock in Interlayer Spacing
Lamination temperature, pressure, and dwell time directly affect resin flow and cured prepreg thickness, and therefore determine interlayer spacing accuracy. Process standards must be carefully defined.
Lamination temperature should match the prepreg glass transition temperature (Tg), typically controlled at 170–180 °C. Excessively high temperatures cause excessive resin flow, resulting in thinner cured prepreg, reduced interlayer spacing, and lower impedance. Temperatures that are too low result in insufficient curing, uneven thickness, and unstable spacing, leading to pcb impedance anomalies.
Lamination pressure is typically controlled at 2.5–3.5 MPa. Insufficient pressure can cause poor bonding and voids, effectively increasing interlayer spacing and impedance. Excessive pressure increases resin flow, reducing spacing and lowering impedance.
Dwell time should be adjusted based on prepreg thickness and type. For standard FR-4 with conventional prepregs, a dwell time of 60–90 minutes is recommended to ensure sufficient resin flow and full curing, locking in the final prepreg thickness. Surface cleanliness and moisture control are equally critical. Oil, dust, or moisture on prepregs or copper surfaces can cause poor bonding, bubbles, and spacing nonuniformity. Pre-baking prepregs at 120 °C for 2–3 hours and cleaning copper surfaces are strongly recommended.
4.Inspection and Calibration to Ensure Compliance
Dual inspection is required to verify alignment between prepreg thickness, interlayer spacing, and pcb impedance, preventing defective products from progressing to subsequent processes.
First, after lamination, sample measurements of cured prepreg thickness (interlayer spacing) should be performed using thickness gauges, with tolerances controlled within ±0.01–0.02 mm depending on impedance requirements. If deviations exceed limits, prepreg selection or lamination parameters must be adjusted.
Second, finished boards should undergo impedance testing. If impedance is higher than target, the root cause is usually excessive interlayer spacing due to overly thick cured prepreg; reducing original prepreg thickness or increasing lamination pressure can correct this. If impedance is lower than target, the spacing is likely too small; increasing prepreg thickness or reducing pressure may be necessary. This closed-loop process—combining thickness inspection and impedance testing—enables continuous optimization and improved consistency.
Future Trends in Interlayer Spacing and PCB Impedance Control
Driven by the rapid development of 5G, IoT, and automotive electronics, PCBs are evolving toward higher frequencies, smaller form factors, and higher densities. As a result, impedance tolerances for mid- and high-frequency PCBs are expected to tighten to within ±2%, requiring interlayer spacing accuracy of ±0.005 mm or better. This places significantly higher demands on prepreg thickness control.
On the materials side, prepregs will evolve toward higher uniformity, lower loss, and more precise resin flow control, offering more stable dielectric constants and thickness characteristics. On the process side, thickness control will increasingly become intelligent and automated, with online interlayer spacing measurement systems and adaptive lamination control that dynamically adjusts process parameters in real time to achieve precise and efficient pcb impedance control.
For PCB manufacturers, mastering the methodology of controlling interlayer spacing and pcb impedance through prepreg thickness adjustment not only resolves current impedance challenges and reduces costs, but also enhances competitiveness and positions them for future high-frequency PCB markets. In PCB manufacturing, true competitive advantage often lies in such subtle details—and prepreg thickness control is the key to unlocking it.
