Optical modules are the core interconnection units in computing infrastructure such as data centres and 5G communications. As optical module speeds rapidly evolve from 100G to 400G, 800G and even 1.6T, the PCB boards that house their circuit and optoelectronic core components are undergoing a comprehensive technological overhaul.
Today, PCB boards have long transcended their traditional role as mere carriers of electronic signals; they have become critical components that determine the upper limits of optical module performance, manufacturing feasibility and long-term reliability, with their technological evolution deeply intertwined with the upgrading of optical modules.
The leap in optical module data rates and increased integration have brought about multi-dimensional technical pressures in areas such as signal transmission, spatial layout and thermal management, placing stringent demands on PCB materials, processes and design. The current core challenges are concentrated in the following four key areas.
1.High-speed signal integrity challenges
With signal rates leaping from 25 Gbps to 112 Gbps and beyond, signal transmission losses in PCB boards have increased significantly. According to signal integrity theory, losses are directly proportional to the square root of the frequency; the superposition of high-frequency harmonics in 112 Gbps PAM4 signals significantly exacerbates conductor and dielectric losses.
The difficulty of loss control has increased dramatically: traditional FR4 substrates (Df = 0.010–0.015) are no longer suitable, as their high dielectric loss can cause eye diagram closure; simultaneously, the skin effect caused by copper foil surface roughness further degrades transmission quality.
Stringent impedance matching requirements: There is a difference in dielectric constant between silicon photonics chips (Dk ≈ 3.5) and PCB substrates. The industry’s precision requirements for controlling 100Ω differential impedance have been raised to within ±5%; even minor deviations can cause reflection and return loss to exceed limits.
Significant pressure to suppress crosstalk: In high-density packaging such as QSFP-DD, over 120 cm of traces must be routed per square centimetre, with 32 high-speed differential pairs and 8 optical channels densely arranged, requiring crosstalk in the 28 GHz band to be below -45 dB.
2.Physical constraints arising from high-density integration
Package miniaturisation (e.g., from QSFP to QSFP-DD) requires PCB boards to achieve high-efficiency integration within limited space, presenting dual bottlenecks in terms of routing density and manufacturing precision.
Routing density pushes process limits: 800G optical modules require line width/spacing (L/S) of 20μm/20μm, with high-end applications requiring 15μm/15μm. Due to the side-etching effect in traditional subtractive processes, line breaks or dimensional instability are likely to occur when line width and spacing fall below 40μm.
Conflicts in opto-electronic co-design: Fibre arrays require positioning accuracy of ±0.5°, with even minor deformation causing optical loss of over 0.5dB; meanwhile, dense routing on high-speed signal layers alters electromagnetic field distribution, interfering with optical signals.
Inter-layer interconnection challenges have intensified: Co-packaged optics (CPO) technology has driven PCB board layer counts to over 20 layers, requiring blind and buried via diameters to be reduced to below 50μm; the precision of traditional drilling and electroplating processes is no longer sufficient.
3.Reliability Challenges Under Harsh Operating Conditions
Data centre optical modules are continuously exposed to an environment of 85°C and 85% relative humidity, placing extremely high demands on the material stability and structural strength of the PCB board.
Risk of thermal mismatch failure: CPO technology significantly increases local heat flux density, requiring the substrate’s coefficient of thermal expansion (CTE) to be controlled within ±0.8 ppm/°C; otherwise, thermal cycling can easily lead to cracks in solder joints or circuits.
Significant Material Ageing and Degradation: High temperatures and humidity accelerate the hydrolysis of dielectric layers and the corrosion of copper layers. Furthermore, fluctuations in the resin content of standard HDI boards can cause dielectric constant drift, necessitating products to undergo rigorous testing for over 240 hours.
Heat dissipation capacity urgently needs improvement: The power consumption of 400G optical modules has exceeded 10W, with 800G modules consuming even more. Traditional aluminium-based heat sinks have limited efficiency, and the PCB’s own thermal conductivity directly affects operating temperature and service life.
4.The Dilemma of Balancing Advanced Processes and Industrialisation Costs
The push towards high-end products is driving process iteration, but the cost pressures arising from high-end materials and precision manufacturing have become a bottleneck to large-scale production.
Process complexity has increased significantly: Advanced processes such as mSAP require LDI, horizontal pulse plating and Class 1000 cleanrooms; equipment and operational costs are far higher than those of standard HDI production lines.
High-end materials are prohibitively expensive: ultra-low-loss substrates such as Panasonic MEGTRON 8 and Rogers RO3000 cost 3–5 times that of FR4, whilst the processing cost of HVLP copper foil is also significantly higher than that of conventional copper foil.
Difficulties in controlling mass production yield: Deviations in high-layer lamination, dust contamination of fine circuits, and micron-level errors in optical alignment can all lead to reduced yields, driving up unit costs.
Countermeasures and Technological Breakthroughs
1.Upgrading to High-End Material Systems
Large-scale application of ultra-low-loss dielectrics: Products such as Isola Astra and Shengyi Technology’s SU series feature a Df as low as 0.001–0.005, reducing dielectric loss by over 60%; combined with materials featuring adjustable Dk (3.8–4.6), this enables dynamic impedance matching.
Iteration of high-precision conductor materials: Widespread adoption of VLP and HVLP copper foils to reduce surface roughness and suppress the skin effect; combined with pulse electroplating to form dense copper layers, thereby enhancing signal stability.
Optimisation of thermal management materials: Development of metal-matrix composite substrates and ceramic-filled dielectric layers, increasing thermal conductivity from 0.3 W/(m·K) to over 5 W/(m·K), alongside embedded resistor-capacitor technology.
2.Precision Innovation in Manufacturing Processes
Scaled-up mass production of the mSAP process: Stable realisation of 15μm/15μm ultra-fine circuits with rectangular cross-sections, optimising impedance control accuracy from ±5% to within ±3%.
Deployment of high-end equipment clusters: LDI equipment with a precision of less than 5μm, combined with horizontal pulse electroplating and etching lines, significantly reduces process deviations.
Breakthroughs in Heterogeneous Integration Processes: We have mastered the direct bonding of indium phosphide lasers to silicon-based PCB boards; combined with machine vision guidance, this has improved fibre alignment accuracy to ±0.1μm.
3.Collaborative Innovation in Design Solutions
Three-dimensional layered architecture design: Adopting a layered strategy of “top-layer fibre array, middle-layer high-speed signals, and bottom-layer power supply and control”, combined with 0.1–0.15 mm gradient microstrip lines, reduces 56 GHz return loss by 8 dB.
Intelligent Routing Algorithm: Utilising an improved A* algorithm and a fibre elastic mechanics model to dynamically plan optimal paths, this approach increases design efficiency by 35% and eliminates crosstalk at the design stage through a safety distance model.
End-to-End Multi-Physics Simulation: Integrates four major tools—SI, PI, thermal simulation and EMC—to predict signal loss, heat distribution and electromagnetic interference in advance, thereby optimising design flaws at an early stage.
Future Evolution Trends
1.Transition from an electrical carrier to an opto-electronic collaborative platform
PCB boards will integrate functional structures such as microchannel cooling and embedded optical waveguides, achieving a trinity of circuit, optical and thermal design. Materials with dynamically adjustable dielectric constants and self-healing resin-based materials will be applied at scale, enhancing reliability under extreme operating conditions. A hybrid process combining ‘semi-additive manufacturing and 3D printing’ can meet the 10μm/10μm routing precision requirements of 1.6T optical modules.
2.CPO Technology Driving High-End Structural Upgrades
CPO optical engine PCB boards designed for AI servers will exceed 70 layers (e.g., NVIDIA’s GB200), with dielectric loss (Df) reduced to below 0.0015 and CTE controlled to ±0.5 ppm/°C. The value of PCB boards for a single AI server has surged from 5,000 yuan for traditional servers to the 1 million yuan range, presenting significant structural opportunities for the industry.
3.Intelligent Coordination Across the Entire Design and Manufacturing Chain
In the future, a comprehensive intelligent ecosystem spanning the entire “demand–design–manufacturing–testing” process will be established: on the design side, digital twins will enable the synchronised R&D of optical modules and PCB boards; on the manufacturing side, AI-powered visual inspection at the nanometre level will replace manual inspections to stabilise mass production yield rates; on the testing side, an integrated opto-electronic testing system will be developed to simultaneously perform signal integrity testing for speeds of 112 Gbps and above, as well as verification of optical coupling efficiency.
